Call For Papers: IEEE Symposium on Very Large Scale Integration (ISVLSI)

6-9 July 2025 | Kalamata, Greece
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Submissions Due: 10 February 2025
  • Research and industry paper submission deadline (6 pages max): 10 February 2025
  • Acceptance notifications: 10 May 2025
  • Final Camera-Ready copy deadline: 30 May 2025
  • Special session proposal deadline: To be announced

Conference Date: 6-9 July 2025


IEEE Symposium on Very Large Scale Integration (ISVLSI)

The IEEE Symposium on VLSI (ISVLSI) is a globally recognized conference that explores emerging trends and innovative concepts across a diverse range of topics within the VLSI umbrella. Here, you will have the opportunity to access cutting-edge research and advancements in VLSI technology, expand your professional network, and draw inspiration from some of the brightest minds in the field. This is your chance to engage with a dynamic community during this must-attend conference. Make your plans to join us from July 6-9, 2025 in Kalamata, Greece.

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Paper Submittals

ISVLSI 2025 invites researchers, scholars, and industry professionals to submit exceptional research for the conference. Authors are asked to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. Papers are encouraged to target one of the program tracks listed below.

Submit A Paper

 

Circuits, Reliability, and Fault-Tolerance (CRT)

Focuses can include analog and mixed-signal circuits design, RF and communication circuits, adaptive circuits and interconnects, design for testability, online testing techniques, Defect and fault recovery strategies, variation-aware design, and sensor networks and their VLSI aspects.

Computer-Aided Design and Verification (CAD)

Areas to be explored include hardware and software co-design, logic and behavioral synthesis, simulation and formal verification, physical design challenges, signal integrity, power and thermal analysis, and statistical approaches in CAD.

Digital Circuits and FPGA based Designs (DCF)

Submit research on digital circuits and innovation, chaos, neural, and fuzzy-logic circuits, high speed and low-power circuits, energy efficient circuit design, near and sub-threshold circuits, memory systems, FPGA designs, and FPGA based systems.

Emerging and Post-CMOS Technologies (EPT)

Areas of interest involve nanotechnology, molecular electronics, optical computing, spin-based computing, biologically-inspired computing, reversible logic, CAD tools for emerging technologies, and cutting edge technology in nanoelectronics and quantum computing including:

  • Carbon Nanotubes (CNT)
  • Single Electron Transistor (SET)
  • Resonant Tunneling Diode (RTD)
  • Quantum Dot Cellular Automata (QCA)

System Design and Security (SDS)

Highlights will involve structured and custom design methodologies, microprocessor design and micro-architecture, embedded processors, signal processing systems, NoC, power and temperature aware designs, hardware security, cryptography, watermarking and IP protection, true random number generators (TRNGs) and security circuits.

VLSI for Applied and Future Computing (AFC)

Key themes will feature neuromorphic and brain-inspired computing, quantum computing, circuits for machine learning and artificial intelligence, methodologies for on-chip learning, deep learning acceleration techniques, use-cases of learning systems, sensors and sensor networks, electronics for Internet of Things (IoT) and smart medical devices.

 

Submit A Paper