Adam Cron’s contributions to IEEE standards remain a prime example of excellence and innovation. Cron is a Distinguished Architect at Synopsys, where he collaborates with clients globally, shaping intricate Test, Security, and Silicon Lifecycle Management tool flows and architectures. As a Syracuse University Computer Engineering graduate, he has left a mark at Motorola and Texas Instruments. Notably, he played a pivotal role in designing the first Integrated Circuits (ICs) compliant with IEEE Std 1149.1. Adam’s influence extends to chairing IEEE Std 1838, standardizing 3D-IC test access, and editing IEEE Std 1149.4 for a mixed-signal test bus. As Vice-Chair of the IEEE Computer Society’s Test Technology Standards Committee and an IEEE Golden Core recipient, his enduring service to the society is commendable. Currently, he leads the Heterogeneous Integration Roadmap Test Technical Working Group and chairs a working group crafting a Rest API for MITRE’s CWE security database.
In honor of his many achievements, he has received the IEEE Computer Society’s 2024 Hans Karlsson Standards Award for, “…outstanding dedication to the development of standards serving industry in the field of electronics testing.”
Thank you for your dedicated service of over 40 years with IEEE and the Computer Society! How has this service helped your career, and how do you foresee it continuing to impact the community in the future?
I joined the IEEE while still in college. Shortly after starting my first job after college, I got direction from Lee Whetsel, a member of the IEEE Std 1149.1 working group. He was doing a lot of traveling to standards meetings and coming back to Dallas with the latest “look” of the standard. This drove my circuit edits for the first 1149.1-compliant chips that TI was building. From there, my interest in standards grew as the industry changed fast, and designers had to react. Staying abreast of standards development has helped me keep up-to-date on chip-testing trends. I think that has made me a little more valuable to the companies I’ve worked for. It’s a cycle that is self-reinforcing. As long as there are interesting electronic products being built, interesting test problems will follow. There’s probably a law or a theorem stating as much.
Honor your colleagues’ achievements. Nominate Someone for a Major Award Today!
Being someone so highly involved within IEEE for such an outstanding amount of time, you must have made some strong connections. How have the connections you’ve formed within the community influenced the trajectory of your professional life?
I do feel like I’ve made real friends from my work on various IEEE standards committees. They keep showing up at conferences. They are in my email inbox or virtual conference screen regularly. And these same folks have sometimes become employees or customers of the companies I have worked for. I’ve always referred to my volunteer work for the IEEE as a “quality diversion”. Some of this work is supported by my company. Some is done on borrowed time. But it’s all interesting: the technology, the personalities, the learning opportunities, and the teaching opportunities.
My advice to those looking to form new connections is to get involved. Many of the current crop of test technologists have been at it year in and year out. That, itself, says a lot about the value. If you want a piece of that, join a standards effort, stay involved, and stick with it. Eventually, you will figure out the mechanics of creating a new standard. But in the meantime, listen, learn, and add value when you can offer it.
As a Distinguished Architect at Synopsys, you work on complex Test, Security, and Silicon Lifecycle Management tool flows and architectures. While in this role, what major contribution are you most proud of?
Fairly early in my Synopsys career, I started to travel to visit customers all over the world. Because of my IEEE standards involvement, I had a little bit of name recognition (in my own mind). My manager dubbed me the “Ambassador of Test.” So, I was very happy to be able to update folks not only on new Synopsys tools and features but also educate them on the array of IEEE Test Standards. Being so long at Synopsys has enabled me to learn the tools, run the flows, and see how all the implementation tools fit together. Seeing and being able to communicate the big picture has allowed me to push R&D to mold the tools so that they work better for our customers. Being a quality conduit – a communicator – between customers and R&D is probably my most valuable contribution to the company.
How have your early experiences at Motorola and Texas Instruments influenced your approach to current challenges in test and security tool architectures?
Texas Instruments let me work very independently. They set up complex problems in the test world, but then let me try to figure them out. The bosses there, like Pete Fleming, were great coaches. Motorola taught me the value of time. Everybody got a pager, and I understood that my quick 5-minute interruption was worth someone else’s 24 hours. As independent as those jobs were, I still learned the value of teamwork. You can’t do it all alone. And this translated well to IEEE standards’ work. However, there is a parallel in tool and feature development and interoperability. It’s best to see what is available now and see if it fits, or could fit, the problem at hand for our customers. And if not, see how to automate the solution so it becomes as seamless as possible for them.
Could you share the significance of standards IEEE Std 1838 and IEEE Std 1500 in the context of 3D-IC test access and modular design, and how they have impacted the industry?
Erik Jan Marinissen started the 3D-IC test standard to extend the vision of IEEE Stds 1149.1, 1500, and 1687 into the multi-die packaging domain. Coincidentally, Erik Jan was also a technical driver of IEEE Std 1500, so we’ll start there. 1500 gave chip designers test modularity. Just as designers close timing at the block level, 1500 enabled DFT closure. Block-level test patterns could be created, fault-simulated (quality validation), and verified before retargeting them to higher levels of the hierarchy. 1687 also provided pattern retargeting facilities for a specific subset of circuit types. Building upon these standards, and connecting them easily to other IEEE test standards, 1838 extended systemic modularity to higher levels of device integration. Without 1838, designers could not easily address 3D stacking test needs and would have to jump through hoops trying to make legacy test standards fit the 2.5D integration paradigm.
As the Vice-Chair of the IEEE Computer Society’s Test Technology Standards Committee (TTSC), overseeing the development of IEEE Test standards, how do you foster collaboration and consensus among committee members?
Luckily, this skill does not resemble “herding cats.” Most, if not all, members of the IEEE test standards development community are professionals and understand the collaborative nature of crowd-sourcing a standards document. As a leader of these development efforts, I listen a lot; allow all members to air their opinions; rely on voting to lock in consensus; and summarize the direction frequently so all members of the effort are on the same page. Chairs of working groups don’t drive a technical solution; they facilitate the team to arrive at the technical solution. Leading the IEEE Standards Association’s Test Technology Standards Committee (TTSC) is similar, and I’ve had a lot of practice in that position. I’ve led the TTSC at various times for about 10 years. That’s a ridiculous amount of time, but I didn’t elect myself. I think I have a good sense of humor, a sound technical background, good communication skills, and I like being around other people. I’ve been lucky.
Your work has been published in journals and books, in addition to speaking at conferences like ITC (International Test Conference) and DAC (Design Automation Conference). Could you highlight a particular paper or presentation that you are most proud of?
I have really enjoyed the panels I have been on in all my domains of interest (test, security, and silicon lifecycle management). Recent issues in design and testing have led to a problem called “silent data corruption” (SDC), for example. It’s a fascinating topic that drives data-sharing amongst industry collaborators and competitors, alike, to foster solutions. Panels allow more real-time data from many industry sources to collide into an interesting and timely narrative illuminating the topic. They’re fun, and who doesn’t enjoy making a presentation fun? This is in stark contrast to my first ITC paper presentation: the topic was IEEE Std 1149.4. This was back in the day when you loaded a slide deck with your images and spoke off the cuff or from some paper prompts. I was nervous and spoke quickly. I think I made all my points, but I made them in about 15 minutes out of a 30-minute timeslot – awkward. But my co-authors of 1149.4, my friends, were in the audience, and they bailed me out by asking questions to fill out the rest of the session. Perhaps more to the point of the question, I am very proud to have made professional relationships with people sympathetic enough to my personal or industry’s problems to pitch in and help get the job done.
More About Adam Cron
Adam Cron is a Distinguished Architect at Synopsys working with customers worldwide on complex Test, Security, and Silicon Lifecycle Management tool flows and architectures for digital ICs. He has helped architect design-for-test, design-for-manufacturing, and security tools for several generations of products. As a Syracuse University Computer Engineering graduate, Adam also worked in test-related fields at Motorola and Texas Instruments where he got his first exposure to IEEE standards while designing the first ICs compliant to IEEE Std 1149.1. Adam is Chair of IEEE Std 1838 which standardized 3D-IC test access, Editor of IEEE Std 1149.4 for a mixed-signal test bus, Vice-Chair of the IEEE Computer Society’s Test Technology Standards Committee which oversees the development of IEEE Test standards, and an IEEE Computer Society Golden Core Membership Recognition recipient for long-standing service to the society. He has authored several papers and book chapters and is a frequent speaker at conference sessions held at events such as ITC (International Test Conference) and DAC (Design Automation Conference). He now serves as a member of the Heterogeneous Integration Roadmap Test Technical Working Group and is also chairing a working group to create a Rest API for MITRE’s CWE (Common Weakness Enumeration) security databases.
